Rahul Shukla

Rahul Shukla

@Rahul63076

VLSI Design & Verification Enthusiast Skilled in Verilog, SystemVerilog, UVM verification & RTL design. || BTech || Electrical Engineering.

Bhadohi
7
Followers
4
Following
21
Public Repos
0
Private Repos

Language Breakdown

Lines of code distribution across 21 owned repositories

633K Total LOC
HTML
307,188 lines
48.5%
N/A
CSS
167,795 lines
26.5%
N/A
Verilog
51,738 lines
8.2%
N/A
SystemVerilog
45,358 lines
7.2%
N/A
JavaScript
36,664 lines
5.8%
N/A
Other
24,754 lines
3.9%
N/A
T

T-Shaped Developer

T-shaped

Deep in HTML with broad versatility

HTML
CSS
Verilog
SystemVerilog
JavaScript

Collaboration Network

Global Impact visualization

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Rahul Shukla
0 active collaborators

Repos

27

PRs

0

Growth

+18%

Top Collaborators

No collaborator data yet.

Coding Streak

Contribution activity over the past year

1 day
91
Contributions
88
Commits
0
Pull Requests
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Open Source Impact

Contributions to external projects

0 merged PRs

No external contributions found.